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Univers Modeler compiles a hardware design description to a fast
simulation model in SystemC. The source code of the hardware block
is written in the Register Transfer Level of a hardware description
languages, which gets compiled into a fast native simulation model
and wrapped with a SystemC interface.
For IP protection, there is
an option to create a fully encrypted model.
Regarding the internal and external signals you can
choose anything in the range from a black box model to a
white box model. A black box model protects all internal
signals. Within a white box model you can bring
some internal signals up to the top-level to be viewed within
SystemC. It is also possible to view all internal signals through
the GUI of other Univers products.
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