Download section: EXPLANATORY MOVIES


Tutorial 1

The movie of tutorial 1 is a good introduction to the Univers tools.

Here you learn how to create a project for software development. Within this project we add an instruction set simulator of the NIOS II CPU from Altera. Next we incorporate, compile and run the application software. This software uses a console window to print the output to, so you learn how to include pre-defined peripherals within the simulation.

Finally we change the NIOS II CPU type from the 'e'-type to the faster 's'-type and we re-simulate the same code and show the results in the profiling window. 

Tutorial_1.wmv
(~6.5 Mb)

 


Tutorial 2
The movie of tutorial 2 shows a multi processor design.

In this tutorial we focus on multi processor features. A project may contain multiple CPU's from different vendors. Additionally Adveda offers the service to create an Instruction Set Simulator for your own specific CPU.

For this tutorial an example project is already created which uses an ARM7TDMI and NIOS II CPU. The combined processors execute a shared job and communicate by shared memory. The shared memory is a predefined 'peripheral' implemented in the Univers tools.

The explanation about single step behavior for designs with multiple clocks is part of this tutorial.

Tutorial_2.wmv
(~3.4 Mb)
 

Tutorial 3
The movie of tutorial 3 shows the co-simulation between a CPU and an RTL design.

In this tutorial the NIOS II CPU is connected by the Avalon Master Data bus to a Pulse Width Modulator, which is implemented in VHDL. Incorporating RTL designs is explained and the example code is compiled. The signal window, showing signals from different modules (CPU, bus model and RTL design) is showed.

The Adveda tools provide a feature to create a software view of RTL designs. An example is showed in this tutorial.

Tutorial_3.wmv
(~5.3 Mb)
 


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