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The mission of Adveda is to offer users the convenience
of a productive and user-friendly development
environment. Additionally the visibility of all
information and the controllability of many settings
required during simulation and
debugging should be improved permanent-ly.
Finally, the compilation and simulation speed should be
the best you can get.
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Adveda is a company in the domain of functional
simulation and verification of software and
hardware. Adveda helps
both SW- and
HW- developers to close the SoC verification
gap by offering fast and fully integrated simulation
and debugging tools.
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Simulating or profiling your
application code in combination with your specific
hardware is nowadays an extremely difficult task.
Systems on Chip (SoC’s) are
getting bigger and bigger
within the ASIC design domain as well as within the FPGA
design domain.
The support for solving these problems is not
overwhelming. The software development tools for most
processors are completely different and can not easily
be combined for multi-processor applications. Engineers
are faced with different tools which have overlap-ping
functionalities, and which basically perform the same
tasks, all of which makes them time-consuming and
expensive. Furthermore, most debuggers show poor data
information and do not sufficiently allow for control
during debug sessions. But the most frustrating and
time-consuming aspect is the extremely low speed of
simulators.
Different market studies show that most of the users
wanted to start their application software development
without the burden of any hardware prototypes.
Many users showed a great interest in the
possibility of simultaneously using more than one
processor and expressed a stringent need to do
co-verification and accurate profiling.
Adveda’s goal is to develop and commercialize tools for
software/hardware co-verification for multi-processor
applications in one single integrated environment.
The mission of Adveda is to offer users the convenience
of a productive and user-friendly development
environment. Additionally the visibility of all
information and the controllability of many settings
required during simulation and
debugging should be improved permanent-ly.
Finally, the compilation and simulation speed should be
the best you can get.
Adveda developed the software simulator
(Instruction-Set-Simulator) and the RTL simulator in one
single environment, thereby strongly reducing the
interconnection over-head.
This co-verification tool is called “UNIVERS COVER” and
allows to start the applica-tion
software development without the burden of any hardware
prototypes. Another unique
feature is the option to simultaneously simulate cores
from different manufacturers.
Furthermore, the speed of the hardware simulator was
increased by a magnitude of 50.
This enormous increase was made possible by the creation
of a cycle-based, two-state logic model simulator and
sophisticated programming. The
speed increase of the total system is about a magnitude
of 70 compared to the best mainstream simulators!
In this type of industry most companies use behavioral
test benches. Besides the cycle-based RTL simulator,
Adveda also provides an accelerated event-driven RTL
simulator. This event-driven simulator runs at speeds up
to ten times faster than other mainstream event-driven
simulators!! If during the
test bench development certain rules are taken into
account, it is possible to use the cycle based simulator
and make use of the tremendous speed increase of this
simulator.
The combination of both software and hardware simulators
in one single development environment can be considered
a milestone. In this exceptional co-verification environ-ment
ultra fast cycle-accurate instruction set simulators are
used. Adveda has the knowledge
to develop these ISS’s for a wide variety of published
cores of different manufacturers.
Univers Tools allows for new or extended cores from
different manufacturers to be applied.
Regardless of all the possible different cores, the
development engineer only needs to learn the features of
the Univers Tools just once, as indeed, there is only
one environ-ment. And
interesting to know: getting the grips on Univers Tools
has a very short learning curve.
Another important advantage is that, as both software
ánd hardware engineers are using the same tools within
the same environment, communication will be a lot
easier. And, they can use each others results almost
instantaneously. Test benches
can be used mutually, eliminating the introduction of
errors in separated test benches.
Thanks to the simulation speed increase, the development
period of a project can be re-duced
by about 30%. This means a
substantial improvement of the time to market.
In addition, faster running simulations will
encourage the engineers to carry out more tests. And
more tests will lead to a more sophisticated and deeper
investigation of application features. This will
increase the ”first time right” chance by approximately
80%. So the number of product problems in the field will
decrease significantly, which in turn will lower
possible post-sales field interventions and recalls.
Depending on the type of a Univers tool license the
“Return On Investments” will vary from 18 to 38
weeks!!!!!
As a general rule, in a simulation environment the
visibility and controllability are based on the data
information generated by the instruction set simulator.
In order to guarantee excellent visibility and
controllability, Adveda develops instruction set
simulators for different processor types of different
manufacturers.
Customers who want to create their own dedicated cores,
or who wish to use specific cores from other
manufacturers, can order Adveda to develop a dedicated
instruction set simulator.
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