Advanced Architecture's A2P CPU fully supported

Introduction

The A2P ISS (Instruction Set Simulator) + Univers tools include:

Full instruction set of A2P
System interconnection to multiple A2P CPU's or other CPU's (Network on chip topology)
System profiling with integrated, market leading, debug facilities
Peripheral models
Single and Double precision floating point
Memory hierarchy model, including caches, write buffers, RAM, FLASH, etc.

RTL extensions (Verilog)
Dedicated Register and Memory windows, as well as all other Univers standard windows
Cycle accuracy

The tools to create highly optimized executables consist of:
C-compiler
Assembler / Disassembler
Linker

A2P Architecture:

Adveda’s development, simulation and debug tools offer the designer full visibility and full controllability of the design. Some of the unique features:

The accurate Static/Dynamic Profiler analyzes the application code:
These measurements pinpoint inefficiencies in the design and enable the concurrent optimization of the system architecture, the hardware and the software. The tool models the complete memory hierarchy which may include cache memories, write buffers, RAMS, flash memories, etc. Using these data the memory subsystem can be configured to achieve optimal performance.

The thorough understanding gained of the hot spots of the profiled algorithms is used to optimize the existing code and then to develop custom instructions as necessary to meet the goals of a particular solution. This may be a performance goal, a power goal, a silicon area goal, or most likely a combination of all three. These instructions are then
integrated into the A2P processor design and the software toolset, and most importantly, the C compiler, are retargeted to the modified processor. The resulting system is then re-profiled to determine the resultant benefit to ensure that the design goals are met.
 

 

When your design contains HDL code you can take advantage of the ultra fast HDL simulator. This simulator is factors faster than mainstream digital simulators.
 

Simultaneous simulation (and debugging) of more A2P processors (or other processors, eg an ARM9) in multi-processor applications including all peripherals (Modelled or Verilog) in one unified simulation environment.
 
Incredible debug facilities, providing full insight in program flow, stack content, expanded C-"struct" content in popup windows, etc.
 
Unlimited breakpoints

About

 

Advanced Architectures (A2) designs high-performance computer systems, subsystems and components. A2’s strengths include the conceptual design and architecture of complete systems including custom DSPs and CPUs.   Advanced Architectures is unique as a design house by being able to provide a leadership role in the development of complete systems from concept through manufacturing. A2’s proficient interfacing with sales, marketing, manufacturing, and finance ensures corporate success. A2’s design experience includes implementing structured design methodologies, performing HDL modeling simulation, performance analysis, logical design, packaging and detailed implementation.


More info

 

If you require more information you can ask Adveda, click here.
For evaluation purposes a full evaluation version of the Univers tools is available.

More info about the A2P processor can be found on the site of A2, click here.

 


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